The present invention relates to a semiconductor device and a method of manufacturing the semiconductor device. Specifically, the invention relates to a technique effectively used for a semiconductor device including a nonvolatile memory including a fin field effect transistor.
A fin field effect transistor is known as a field effect transistor that allows a reduction in leakage current, power consumption, and size while operating at high speed. The fin field effect transistor (FINFET) is, for example, a semiconductor element that has a channel layer including a pattern of a semiconductor layer formed on a substrate, and has a gate electrode formed so as to straddle the pattern.
The electrically erasable and programmable read only memory (EEPROM) is widely used as an electrically writable and erasable, nonvolatile semiconductor memory device. Such a memory device typified by a currently widely used flash memory has a conductive floating gate electrode surrounded by an oxide film or a trapping insulating film below a gate electrode of a MISFET, uses a charge storage state in the floating gate or the trapping insulating film as memory information, and reads the charge storage state as a threshold of the transistor. The trapping insulating film refers to a charge-storable insulating film, and includes, for example, a silicon nitride film. Electric charges are injected or emitted into/from such a charge storage region to shift the threshold voltage of the MISFET, and thus the MISFET is allowed to operate as a memory element. Such a flash memory includes a split-gate cell using a metal-oxide-nitride-oxide-semiconductor (MONOS) film.
Japanese Unexamined Patent Application Publication No. 2006-41354 describes formation of a split-gate MONOS memory including a fin field effect transistor.